1. Field of the Invention
The present invention relates to an array substrate and a display device. More particularly, the present invention relates to a pixel array substrate and a liquid crystal display (LCD).
2. Description of Related Art
Multi-media progress has benefitted from the rapid improvement of semiconductor devices or displays. As for displays, flat panel displays featuring high definition, good space utilization, low power consumption, no radiation, etc., have gradually become mainstream products in the market. Among them, a thin film transistor (TFT) LCD is the most mature flat panel display.
FIG. 1 is a circuit diagram of a conventional TFT-LCD. Referring to FIG. 1, generally speaking, TFTs (TFT10A, TFT10B, TFT10C . . . ) of pixels (P10A, P10B, P10C . . . ) arranged in the same row of an LCD device are driven by a scan line S10. When the scan line S10 provides a sufficient actuation voltage, the TFTs (TFT10A, TFT10B, TFT10C . . . ) connected to the scan line S10 are turned on, such that data (voltage level) loaded on each data line D10 can be written into the pixels (P10A, P10B, P10C . . . ). After the above writing operation is completed, the TFTs (TFT10A, TFT10B, TFT10C . . . ) are turned off, and the voltage level of the pixel electrode in each pixel (P10A, P10B, P10C . . . ) is maintained by a liquid crystal capacitance CLC, a pixel storage capacitance CST, etc.
However, when the TFTs (TFT10A, TFT10B, TFT10C . . . ) are turned off after charging the pixels, the voltage level of the pixel electrode in each pixel (P10A, P10B, P10C . . . ) is liable to be changed under the influence of variations in peripheral voltages. Such a voltage level deviation of the pixel electrode is known as a feed-through voltage (VF). The feed-through voltage is expressed by:VF=[CGD/(CLC+CST+CGD)]×ΔVG  (1)where, in equation (1), CLC is a liquid crystal capacitance, CST is a pixel storage capacitance, CGD is a capacitance between the gate electrode and the drain electrode of a TFT, and ΔVG is a voltage difference of the scan line when the TFTs are turned on and turned off. According to an operating principle of the LCD device, the rotation angles of liquid crystal molecules are changed mainly by the magnitude of an applied electric field, thus representing various gray-scale variations. As the magnitude of the electric field applied to the liquid crystal molecules depends on a voltage difference between a pixel electrode of each pixel and a common electrode, when a ideal driving voltage level of the pixel electrode shifts under the influence of the feed-through voltage VF, a display quality of the LCD device is affected, for example, a flicker phenomenon occurs. Generally speaking, VF is obtained by estimating the values of CGD and so on, so the flicker phenomenon can be improved through compensation the driving voltage shift (VF) in various conventional techniques in theory.
However, as the trend for the LCD device having been developed toward a greater size, during an exposure and development process using a mask to fabricate a large-sized LCD, it is difficult to control the overall precision of a large-sized mask due to factors such as thermal expansion and cold contraction, such that an overlay alignment error (generally called Overlay deviation) between metal layers of the TFT will become worse. Therefore, as the pixel storage capacitances CST and the gate/drain capacitances CGD of the pixels are usually distributed everywhere in an exposure range of the large-sized mask, the errors compared with the ideal estimated values become non-negligible. As a result, according to Equation (1), the driving voltages of the pixels cannot be precisely compensated with the estimated values of VF. Thus, flickering of the LCD image occurs.
Further, in a patterning process of each pixel of the LCD, usually it is hard to control the exposure time, dose energy, and photoresist thickness precisely, and thus when defining, for example, the size of the line width of each metal layer of the TFT, an error, for example, deviation due to expansion/shrinkage of the size of the gate electrode, drain electrode, or source electrode, also referred to as line-width error, or so called critical dimension (CD) error, is generated, due to being located in an exposure range. If distributed in the exposure range of the large-sized mask, it becomes difficult to control the patterning process of the pixels in some areas, so the pixel storage capacitance CST and the gate/drain capacitance CGD of these areas usually have non-negligible errors as compared with the ideal estimated values. As a result, according to Equation (1), the driving voltages of the pixels in each area cannot be compensated exactly with the estimated values of VF. Thus, a flicker or mura of the LCD image occurs.